Lab 11.15 - Runtime bridge_rx_only witness using stock TX and gpreg RX counters¶
Objective¶
Determine whether the runtime RX path inside the course PL overlay can observe any samples when the stock AD9361 host TX path is used as the signal source.
The lab separates two possible failure modes that look identical in earlier logs:
- the overlay bitstream is loaded correctly and
axi_gpreganswers, but the PL RX chain never incrementsrx_valid_countregardless of what drives TX; - the PL RX chain increments
rx_valid_countwhen a known-good host TX drives the link, but was starved earlier because the course PL TX also was broken.
Using the stock host TX as a witness eliminates the second ambiguity.
Background terms¶
bridge_rx_only: abridge_txrx_muxoverlay variant where TX is strapped to a constant and only the RX datapath from the AD9361 is wired into the PL BPSK chain, removing PL TX as a variable.host TX: the stock AD9361 DMA TX path driven directly from the Linux host over network IIO — the same cyclic-BPSK burst used in Lab 11.14.gpreg RX counters:rx_valid_countandreceived_bitsinsideaxi_gpregat0x79040000; non-zero means the PL framer actually processed symbols.rx_common re-init: an optional write to the AD9361 RX common control register to re-arm the DMA path before capture; controlled by--rx-common-reinit.
Files¶
| Path | Purpose |
|---|---|
blocks/block_11_integrated_sdr_project/python/lab_11_15_runtime_bridge_rx_host_tx_probe.py |
load bridge_rx_only overlay, run stock host TX, poll gpreg RX counters |
blocks/block_11_integrated_sdr_project/python/runtime_rx_common.py |
shared helper to force RX common control register re-init |
Run¶
python blocks/block_11_integrated_sdr_project/python/lab_11_15_runtime_bridge_rx_host_tx_probe.py \
--bit-bin tmp/bridge_rx_only.wordswap.bit.bin \
--run-tag live_witness
The script:
- uploads and loads
bridge_rx_only.wordswap.bit.binthrough Linuxfpga_manager; - probes
axi_gpregID/signature to confirm the overlay is alive; - configures the stock AD9361 RX path at 915 MHz / 3.84 MS/s;
- optionally forces
rx_commonre-init if--rx-common-reinitis given; - starts a cyclic BPSK burst from the host TX path;
- polls
rx_valid_countandreceived_bitsup to--poll-limittimes; - stops TX, restores AD9361 state, optionally reboots;
- saves a JSON evidence file with all counter snapshots and timing.
Safe first settings (checked-in defaults)¶
| Parameter | Default |
|---|---|
| Center frequency | 915 MHz |
| Sample rate | 3.84 MS/s |
| RF bandwidth | 2 MHz |
| TX attenuation | -50 dB |
| RX gain | 35 dB |
| Poll limit | 128 |
| Poll delay | 20 ms |
start_offset |
62 |
Interpreting the result¶
rx_valid_count after TX |
Meaning |
|---|---|
| remains 0 | PL RX chain is not receiving samples — overlay or DMAC issue |
| increments | PL RX chain is alive; previous failure was PL TX starvation |
If rx_valid_count stays zero even with a confirmed host TX burst, the blocker
is inside the bridge_rx_only RX datapath or the AD9361→PL interface, not in
the BPSK modem TX logic.
Evidence collected on 2026-06-23¶
The bridge_rx_only witness run showed rx_valid_count = 0 after both a plain
overlay reload and after an rx_common re-init attempt, while the host stock TX
was confirmed to be transmitting the BPSK cyclic burst. This proved that the PL
RX path itself does not receive samples from the AD9361 under the runtime
overlay — irrespective of what generates the RF signal.
Next step: investigate whether the AD9361 → PL sample bus (LVDS or parallel)
is properly re-armed after a hot fpga_manager reload.
Report checklist¶
- [ ] Record
axi_gpregID value (confirm 0x4250534B). - [ ] Record
tx_valid_count,rx_valid_count,received_bitsafter each poll. - [ ] Note whether
rx_commonre-init changed the counter trajectory. - [ ] Attach
dmesgtail. - [ ] Confirm host TX was transmitting (BER = 0 from a stock-shell self-check).
Engineering conclusion template¶
The runtime bridge_rx_only overlay loaded and axi_gpreg ID = 0x____.
After ____ poll cycles with stock host TX active at ____ MHz,
rx_valid_count = ____ and received_bits = ____.
RX common re-init was / was not attempted; it did / did not change the result.
Conclusion: the PL RX path is / is not receiving AD9361 samples under the
runtime overlay because ______.